The present invention relates to a gate driving circuit for a voltage-driven power semiconductor switching device used in a power converter system.
In voltage-driven power semiconductor devices such as MOSFETs and IGBTs, development is in progress toward handling larger electrical currents. Furthermore, in MOSFETs used in power supply applications, development is in progress towards having lower power-supply voltages in addition to handling larger electrical currents. Where a power semiconductor device is driven with large currents and low voltages, if the external interconnect inductance is large, an excessive voltage is generated across the power semiconductor device. This creates the possibility that the device is destroyed. Therefore, the key technique is to reduce the external interconnect inductance or to reduce the internal inductance of the power semiconductor module. Such a technique for reducing external interconnect inductances is disclosed, for example, in JP2002-44964 (patent reference 1), especially from paragraph 0017 to paragraph 0019.